Verilog HDL : a guide to digital design and synthesis / Samir Palnitkar.
By: Palnitkar, Samir.
Material type:
TextPublisher: New Delhi. Pearson Education Inc, c2003Edition: 2nd ed.Description: 490 p., Rs. 425.00 ill. ; 25 cm.ISBN: 0130449113 :.Subject(s): Verilog (Computer hardware description language)DDC classification: 621.392
| Item type | Current location | Call number | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|
| Book | Chennai Mathematical Institute General Stacks | 621.392 PAL (Browse shelf) | Available | 8757 |
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| 621.367 GON Digital image processing / | 621.367 GON Digital image processing / | 621.382 WOY A first course in statistics for signal analysis / | 621.392 PAL Verilog HDL : a guide to digital design and synthesis / | 621.395 COR Logic synthesis for asynchronous controllers and interfaces / | 621.398 HAE Stochastic geometry for wireless networks / | 621.484 WES Tokamaks / |
One CD-ROM in pocket attached at back of book.
"A Prentice Hall title"--T.p.
"Professional technical reference"--Back cover.
Previous ed.: 1996.
Formerly CIP. Uk
Includes bibliographical references (p. 439-440) and index.